4 research outputs found

    Hardware Implementation of Neural Self-Interference Cancellation

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    In-band full-duplex systems can transmit and receive information simultaneously on the same frequency band. However, due to the strong self-interference caused by the transmitter to its own receiver, the use of non-linear digital self-interference cancellation is essential. In this work, we describe a hardware architecture for a neural network-based non-linear self-interference (SI) canceller and we compare it with our own hardware implementation of a conventional polynomial based SI canceller. In particular, we present implementation results for a shallow and a deep neural network SI canceller as well as for a polynomial SI canceller. Our results show that the deep neural network canceller achieves a hardware efficiency of up to 312.8312.8 Msamples/s/mm2^2 and an energy efficiency of up to 0.90.9 nJ/sample, which is 2.1Ă—2.1\times and 2Ă—2\times better than the polynomial SI canceller, respectively. These results show that NN-based methods applied to communications are not only useful from a performance perspective, but can also be a very effective means to reduce the implementation complexity.Comment: Accepted for publication in IEEE Journal on Emerging and Selected Topics in Circuits and System

    Design and Implementation of a Neural Network Aided Self Interference Cancellation Scheme for Full-Duplex Radios

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    In-band full-duplex systems are able to transmit and receive information simultaneously on the same frequency band. Due to the strong self-interference caused by the transmitter to its own receiver, the use of non-linear digital self interference cancellation is essential. In this work, we present a hardware architecture for a neural network based non-linear self-interference canceller and we compare it with our own hardware implementation of a conventional polynomial based canceller. We show that, for the same cancellation performance, the neural network canceller has a significantly higher throughput and requires fewer hardware resources

    Hardware Implementation of Neural Self-Interference Cancellation

    No full text
    In-band full-duplex systems can transmit and receive information simultaneously and on the same frequency band. However, due to the strong self-interference caused by the transmitter to its own receiver, the use of non-linear digital self-interference cancellation is essential. In this work, we describe a hardware architecture for a neural network-based non-linear self-interference (SI) canceller and we compare it with our own hardware implementation of a conventional polynomial based SI canceller. Our results show that, for the same SI cancellation performance, the neural network canceller has an 8.1x smaller area and requires 7.7x less power than the polynomial canceller. Moreover, the neural network canceller can achieve 7 dB more SI cancellation while still being 1.2x smaller than the polynomial canceller and only requiring 1.3x more power. These results show that NN-based methods applied to communications are not only useful from a performance perspective, but can also lead to order-of-magnitude implementation complexity reductions
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